Description
The MVD MDIO STA Management Interface is
a drop-in module for an easy control of
the Ethernet PHY (writing or reading PHY
registers). |
 |
|
Features
- Drop-in module for Spartan™-6, Virtex™-7, Artix™-7, Kintex™-7 and Zynq™ Xilinx FPGAs
- Write / Read PHY Registers
- MDIO Output Interface
- MDC clock generation
- Up to 32 components managed
- IEEE 802.3 compliant
- CPU Interface for an easy
control
|